{"id":5825,"date":"2026-11-03T08:31:07","date_gmt":"2026-11-03T08:31:07","guid":{"rendered":"https:\/\/flj-pcb.com\/?page_id=5825"},"modified":"2026-11-03T08:31:07","modified_gmt":"2026-11-03T08:31:07","slug":"pcb-stackup-review","status":"publish","type":"page","link":"https:\/\/flj-pcb.com\/da\/tools\/pcb-stackup-review\/","title":{"rendered":"PCB Stackup Calculator &#038; Review Tool"},"content":{"rendered":"<div class=\"st-page flj-page\" id=\"flj-content\"><div class=\"st-title\"><div class=\"st-shell\"><div class=\"st-breadcrumb\"><a href=\"https:\/\/flj-pcb.com\/da\/\">Hjem<\/a><span>\/<\/span><a href=\"https:\/\/flj-pcb.com\/da\/support\/\">Engineering resources<\/a><span>\/<\/span><span>Stackup tool<\/span><\/div><div class=\"st-title-top\"><span class=\"st-kicker\">FLJ engineering tools<\/span><span class=\"st-version\">v1 \u00b7 Local calculation<\/span><\/div><h1>PCB Stackup Calculator &amp; Review Tool<\/h1><p>Check stack thickness and preview surface microstrip impedance from an editable layer schedule.<\/p><div class=\"st-jumplinks\"><a href=\"#st-howto\">How to use<\/a><a href=\"#st-workbench\">Open workspace \u2193<\/a><a href=\"#st-methods\">Methods &amp; assumptions<\/a><a href=\"#st-review\">Gennemgang af produktionen<\/a><\/div><\/div><\/div><div class=\"st-shell\"><section class=\"st-support\" id=\"st-howto\">\n<h2>How to Use the Stackup Tool<\/h2>\n<ol>\n<li><strong>Choose a starting example.<\/strong> Select a layer-count example, then edit the copper roles and finished copper thicknesses, plus each core or prepreg gap\u2019s pressed thickness and material details. Treat the example as a starting point; enter the construction you intend to review.<\/li>\n<li><strong>Inspect the changed construction.<\/strong> Compare the total with your target and open any mirror differences. Check each signal layer\u2019s adjacent declared reference. For impedance work, add the Dk and test context for the selected outer dielectric gap.<\/li>\n<li><strong>Calculate and export.<\/strong> For an eligible outer signal layer over its declared adjacent reference plane, calculate single-ended microstrip impedance or solve for trace width. Export the stackup and impedance scenario as a CSV for your own review or to share in a manufacturing inquiry.<\/li>\n<\/ol>\n<\/section><section class=\"st-workbench\" id=\"st-workbench\">\n<div class=\"st-section-head\"><div><span class=\"st-kicker\">Interactive engineering workspace<\/span><h2>Build and Review Your PCB Stackup<\/h2><\/div><span class=\"st-local\"><i><\/i> Live results \u00b7 updates as you edit<\/span><\/div>\n<div aria-label=\"Quick start\" class=\"st-start-steps\"><a href=\"#st-preset\"><b>1<\/b> Choose layer count<\/a><span aria-hidden=\"true\">\u2192<\/span><a href=\"#st-editor\"><b>2<\/b> Enter your thicknesses<\/a><span aria-hidden=\"true\">\u2192<\/span><a href=\"#st-export\"><b>3<\/b> Review &amp; export<\/a><\/div>\n<noscript><p class=\"st-notice\">Enable JavaScript to use the calculator. The calculation methods and manufacturing services below remain available.<\/p><\/noscript>\n<div class=\"st-toolbar\">\n<label>Example layer count <select id=\"st-preset\"><option value=\"2\">2 copper layers<\/option><option selected=\"\" value=\"4\">4 copper layers<\/option><option value=\"6\">6 copper layers<\/option><option value=\"8\">8 copper layers<\/option><option value=\"10\">10 copper layers<\/option><option value=\"12\">12 copper layers<\/option><\/select><\/label>\n<label>Display units <select id=\"st-unit\"><option value=\"mm\">mm<\/option><option value=\"mil\">mil<\/option><\/select><\/label>\n<label>Target thickness (optional) <span class=\"st-input-unit\"><input id=\"st-target\" min=\"0\" step=\"any\" type=\"number\" value=\"1.6\"\/><span data-unit=\"\">mm<\/span><\/span><\/label>\n<button class=\"st-button st-secondary\" id=\"st-reset\" type=\"button\">Reset example<\/button>\n<\/div>\n<div class=\"st-example-note\"><div>Start with the filled example, then replace its thickness and Dk values with your data. Values are illustrative, not a stocked construction. <strong>Results update automatically as you edit.<\/strong><\/div><div hidden=\"\" id=\"st-history\"><span id=\"st-change-status\" role=\"status\"><\/span> <button class=\"st-text-button\" id=\"st-undo\" type=\"button\">Undo example change<\/button><\/div><\/div>\n<div class=\"st-workspace\">\n<div class=\"st-editor st-panel\" id=\"st-editor\">\n<div class=\"st-panel-head\"><h3>Layer Editor<\/h3><span id=\"st-layer-count\">4 copper \u00b7 3 dielectric gaps<\/span><\/div>\n<p class=\"st-panel-help\"><strong>L = copper layer; D = dielectric gap.<\/strong> Enter finished copper and pressed dielectric thicknesses. Dk is needed only for the impedance preview.<\/p><div class=\"st-editor-options\"><button aria-controls=\"st-layers\" aria-expanded=\"false\" class=\"st-text-button\" id=\"st-notes-toggle\" type=\"button\">Add material notes (optional)<\/button><a href=\"#st-impedance\">Go to impedance preview \u2193<\/a><\/div><p class=\"st-notes-help\" hidden=\"\" id=\"st-notes-help\">Optional record fields: material grade \/ glass style, and the test frequency \/ method for the entered Dk. They do not look up a material or change Dk automatically.<\/p>\n<div aria-label=\"Editable stackup layers\" class=\"st-table-wrap\" role=\"region\" tabindex=\"0\"><table class=\"st-layer-table\"><thead><tr><th scope=\"col\">Lag<\/th><th scope=\"col\">Role \/ type<\/th><th scope=\"col\">Tykkelse <span data-unit=\"\">mm<\/span><\/th><th scope=\"col\">Dk<small>for impedance<\/small><\/th><th scope=\"col\">Material notes (optional)<\/th><\/tr><\/thead><tbody id=\"st-layers\"><\/tbody><\/table><\/div>\n<div class=\"st-copper-helper\"><strong>Nominal copper helper<\/strong><label><span class=\"st-sr-only\">Nominal copper weight<\/span><select id=\"st-oz\"><option value=\"0.5\">0.5 oz<\/option><option selected=\"\" value=\"1\">1 oz<\/option><option value=\"2\">2 oz<\/option><option value=\"3\">3 oz<\/option><\/select><\/label><span id=\"st-oz-value\">\u2248 35 \u00b5m<\/span><span>Approximation only; use the specified finished thickness in the table.<\/span><\/div>\n<\/div>\n<aside class=\"st-preview st-panel\" id=\"st-preview\">\n<div class=\"st-panel-head\"><h3>Stackup Preview and Checks<\/h3><\/div>\n<div aria-atomic=\"true\" aria-live=\"polite\" class=\"st-totals\" id=\"st-totals\"><\/div>\n<figure class=\"st-stack-figure\"><div aria-label=\"Cross-section of the entered layer stack\" id=\"st-cross-section\"><\/div><figcaption>Copper heights have a minimum display size for visibility; this sketch is not exactly to scale. Solder mask and other coatings are not shown.<\/figcaption><\/figure>\n<div class=\"st-checks\" id=\"st-checks\"><\/div>\n<\/aside>\n<\/div>\n<div class=\"st-impedance st-panel\" id=\"st-impedance\">\n<div class=\"st-impedance-intro\"><span class=\"st-kicker\">Connected to your layer data<\/span><h3>Microstrip Impedance Preview<\/h3><p>Estimate an <strong>uncoated, single-ended outer trace<\/strong> over an adjacent declared reference plane. The local dielectric height and Dk come directly from the layer editor.<\/p><div aria-hidden=\"true\" class=\"st-model-sketch\"><div class=\"st-air\">AIR<\/div><div class=\"st-trace\"><\/div><div class=\"st-substrate\"><span>w \u00b7 trace width<\/span><span>h \u00b7 pressed dielectric<\/span><\/div><div class=\"st-plane\"><\/div><span>Continuous reference plane assumed<\/span><\/div><p class=\"st-small\">Inner-layer, differential and coplanar lines require a different model. This preview excludes solder mask, frequency dispersion, roughness and loss.<\/p><\/div>\n<div class=\"st-impedance-controls\">\n<div class=\"st-form-grid\">\n<label>Signal surface <select id=\"st-side\"><option value=\"top\">Top copper layer<\/option><option value=\"bottom\">Bottom copper layer<\/option><\/select><\/label>\n<label>Beregning <select id=\"st-mode\"><option value=\"forward\">Trace width \u2192 impedance<\/option><option value=\"inverse\">Target impedance \u2192 width<\/option><\/select><\/label>\n<label id=\"st-width-label\">Sporbredde <span class=\"st-input-unit\"><input id=\"st-width\" min=\"0\" step=\"any\" type=\"number\" value=\"0.3\"\/><span data-unit=\"\">mm<\/span><\/span><\/label>\n<label hidden=\"\" id=\"st-z-label\">Target impedance <span class=\"st-input-unit\"><input id=\"st-z\" min=\"0\" step=\"any\" type=\"number\" value=\"50\"\/><span>\u03a9<\/span><\/span><\/label>\n<\/div><p class=\"st-scenario-help\">Thickness checking works without Dk. For this estimate, use the selected gap\u2019s Dk from your material data; the example value 4.2 is not a material specification.<\/p>\n<p class=\"st-geometry\" id=\"st-geometry\"><\/p>\n<div aria-atomic=\"true\" aria-live=\"polite\" class=\"st-impedance-result\" id=\"st-impedance-result\"><\/div>\n<p class=\"st-domain\">Tool scope: 0.01 \u2264 w\/h \u2264 100, t\/h \u2264 0.5, t\/w \u2264 0.5 and 1 \u2264 Dk \u2264 128. These are calculation guards, not manufacturing limits or an accuracy guarantee.<\/p>\n<\/div>\n<\/div>\n<div class=\"st-export-bar\" id=\"st-export\"><div><strong>Keep the layer data and the assumptions together.<\/strong><p>Download the current entries and review notes, or copy a plain-text engineering summary.<\/p><\/div><div class=\"st-export-actions\"><button class=\"st-button\" id=\"st-csv\" type=\"button\">Download CSV \u2193<\/button><button class=\"st-button st-secondary\" id=\"st-copy\" type=\"button\">Copy summary<\/button><\/div><\/div>\n<p class=\"st-export-status\" id=\"st-export-status\" role=\"status\"><\/p><div hidden=\"\" id=\"st-copy-fallback\"><label for=\"st-summary\">Clipboard unavailable. Select and copy the summary below.<\/label><textarea id=\"st-summary\" readonly=\"\" rows=\"9\"><\/textarea><\/div>\n<\/section>\n<section id=\"st-methods\">\n<h2>Calculation Methods and Assumptions<\/h2>\n<div class=\"st-method-col\"><h3>Thickness and Mirror Comparisons<\/h3>\n<p>The board thickness estimate is the sum of the finished copper and pressed dielectric thickness entered for each layer or gap:<\/p>\n<p><code>T = \u03a3(Cu) + \u03a3(dielectric)<\/code><\/p>\n<p>Copper and dielectric contributions are also shown separately, with the difference from an optional target thickness. Enter finished copper thickness when plating is already included; the estimate adds no extra plating. Coatings such as solder mask are outside this base total. A glass style such as 1080 or 2116 alone does not determine a pressed dielectric thickness: record the actual construction and its material properties, including Dk and its test frequency where known.<\/p>\n<p>Mirror comparison checks corresponding layers for thickness and material differences. A close match can help review a symmetric construction, but matching totals or mirrored entries does not establish copper coverage balance or guarantee freedom from warpage. Layer roles also do not verify plane continuity.<\/p>\n<\/div><div class=\"st-method-col\"><h3>Open-Source Microstrip Model<\/h3>\n<p>The impedance preview uses the quasi-static Hammerstad\u2013Jensen equations with a finite copper-thickness correction, adapted in JavaScript from <a href=\"https:\/\/github.com\/scikit-rf\/scikit-rf\/blob\/f08f683460cfe495424279261471aaddac3c3b1e\/skrf\/media\/mline.py\" target=\"_blank\" rel=\"noopener\">scikit-rf\u2019s pinned MLine source<\/a>. Width, dielectric height and copper thickness share one unit; Dk is dimensionless. The model assumes an uncoated surface trace over a continuous plane. It excludes inner-layer stripline, differential pairs, coplanar geometry, vias, solder mask, frequency dispersion, roughness and loss. The width solver searches only within the displayed geometry guards; those guards do not certify model accuracy or fabrication.<\/p><details class=\"st-license\"><summary>Open-source attribution and BSD 3-Clause license<\/summary><p>JavaScript adaptation: scalar inputs, validation and bracketed width search added for FLJ PCB. Source commit f08f683460cfe495424279261471aaddac3c3b1e. <a href=\"https:\/\/flj-pcb.com\/wp-content\/plugins\/flj-site-assets\/assets--tools--stackup--scikit-rf-LICENSE.txt\">Download the source license<\/a>.<\/p><pre>Copyright (c) 2010, Alexander Arsenovic\nAll rights reserved.\n\nCopyright (c) 2020, scikit-rf Developers\nAll rights reserved.\n\nRedistribution and use in source and binary forms, with or without modification,\nare permitted provided that the following conditions are met:\n\n* Redistributions of source code must retain the above copyright notice, this\n  list of conditions and the following disclaimer.\n\n* Redistributions in binary form must reproduce the above copyright notice, this\n  list of conditions and the following disclaimer in the documentation and\/or\n  other materials provided with the distribution.\n\n* Neither the name of the scikit-rf nor the names of its\n  contributors may be used to endorse or promote products derived from\n  this software without specific prior written permission.\n\nTHIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS \"AS IS\" AND\nANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED\nWARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE\nDISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR\nANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES\n(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;\nLOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON\nANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT\n(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS\nSOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\n<\/pre><\/details><\/div><\/section>\n<section id=\"st-review\">\n<h2>Turn Your Stackup into a Manufacturing Review<\/h2>\n<div><p>Use the locally exported stackup as a starting point for a project review. Pair the layer schedule with the laminate family and pressed core or prepreg construction you are considering; a glass style alone does not specify the finished dielectric thickness. The <a href=\"https:\/\/flj-pcb.com\/da\/pcb-materials\/\">PCB materials guide<\/a> can help frame those material questions.<\/p><p>FLJ develops manufacturing stackups around the selected laminate system, pressed dielectric build and finished copper geometry. Our <a href=\"https:\/\/flj-pcb.com\/da\/pcb-manufacturer\/impedance-control-pcb\/\">impedance-control service<\/a> connects the target impedance and reference structure to trace-width calculations, fabrication geometry and the project\u2019s specified coupon and TDR checks. Send inner-layer, differential or coplanar requirements too; they need the corresponding transmission-line model.<\/p><p>Attach the exported schedule and fabrication notes to your own inquiry, with board files, target tolerances and open material questions. We can propose a construction for your board and resolve changes before fabrication. The local export itself is not manufacturing approval.<\/p><\/div><div class=\"st-review-aside\"><span>From estimate to fabrication<\/span><strong>Materials.<br\/>Finished geometry.<br\/>Impedance requirements.<\/strong><a class=\"st-button\" href=\"https:\/\/flj-pcb.com\/da\/contact\/\">Discuss your stackup \u2197<\/a><\/div><\/section>\n<section id=\"st-faq\">\n<h2>PCB Stackup Tool FAQs<\/h2>\n<details>\n<summary>What is included in the calculated stackup thickness?<\/summary>\n<p>The total adds the entered finished copper and pressed dielectric thicknesses. Finished copper includes its plating contribution, so the tool adds no extra plating. Solder mask and other coatings are excluded. This is the declared stack thickness, not a guaranteed finished-board maximum.<\/p>\n<\/details>\n<details>\n<summary>Can a glass style such as 1080 or 2116 determine the pressed thickness?<\/summary>\n<p>No. Glass style alone does not specify pressed dielectric thickness. Resin content, copper foil, material system, and the manufacturer&#8217;s construction affect the result. Enter the actual pressed thickness and dielectric constant supplied for the selected construction. See <a href=\"https:\/\/flj-pcb.com\/da\/pcb-materials\/\">PCB material properties<\/a>.<\/p>\n<\/details>\n<details>\n<summary>Does this preview calculate inner-layer or differential impedance?<\/summary>\n<p>The included estimate covers static, uncoated surface microstrip with one signal trace and a reference plane. It does not model inner-layer stripline, differential pairs, solder mask, vias, coplanar geometry, frequency dispersion, or conductor roughness. Treat it as an early estimate.<\/p>\n<\/details>\n<details>\n<summary>Does a layer labelled Ground prove a continuous reference plane?<\/summary>\n<p>No. \u201cGround\u201d is a layer label in the stackup record; it does not describe copper coverage, clearances, splits, or connectivity. Review the board layout to confirm the return path is continuous where the signal runs.<\/p>\n<\/details>\n<details>\n<summary>Are my stackup inputs submitted to a server?<\/summary>\n<p>The calculator and CSV export run locally in your browser; their stackup inputs are not sent to a calculator server. Normal site requests, such as loading page assets, still occur.<\/p>\n<\/details>\n<details>\n<summary>What should I send FLJ for a manufacturing stackup review?<\/summary>\n<p>Export the stackup and impedance scenario, then share the target impedance, actual laminate and pressed dielectric data, finished copper and trace geometry, and layer or return-path details. Ask the engineer to confirm material availability, finished geometry, and whether a test coupon or TDR verification is needed. <a href=\"https:\/\/flj-pcb.com\/da\/contact\/\">Contact FLJ<\/a> with the exported data.<\/p>\n<\/details>\n<\/section>\n<div class=\"st-final-note\">The editable layer range describes this tool\u2019s examples, not FLJ\u2019s manufacturing capacity.<div class=\"st-related\"><a href=\"https:\/\/flj-pcb.com\/da\/pcb-manufacturer\/4-layer-pcb\/\">4-layer PCB manufacturing<\/a><a href=\"https:\/\/flj-pcb.com\/da\/pcb-manufacturer\/6-layer-pcb\/\">6-layer PCB manufacturing<\/a><\/div><\/div><\/div><\/div>","protected":false},"excerpt":{"rendered":"<p>Home\/Engineering resources\/Stackup tool FLJ engineering toolsv1 \u00b7 Local calculation PCB Stackup Calculator &amp; Review Tool Check stack thickness and preview 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