{"id":5165,"date":"2026-08-21T08:48:25","date_gmt":"2026-08-21T08:48:25","guid":{"rendered":"https:\/\/flj-pcb.com\/?p=5165"},"modified":"2026-08-21T08:48:29","modified_gmt":"2026-08-21T08:48:29","slug":"pcb-assembly-defects-causes-prevention","status":"publish","type":"post","link":"https:\/\/flj-pcb.com\/vi\/pcb-assembly-defects-causes-prevention\/","title":{"rendered":"Common PCB Assembly Defects: Causes and Solutions"},"content":{"rendered":"<style>\n\n        #blog-content *,\n        #blog-content *::before,\n        #blog-content *::after {\n            box-sizing: border-box;\n        }\n\n        \/* Headings *\/\n        #blog-content h1,\n        #blog-content h2,\n        #blog-content h3,\n        #blog-content h4,\n        #blog-content h5,\n        #blog-content h6 {\n            color: #1a1a1a;\n            line-height: 1.35;\n            margin: 1.8em 0 0.6em;\n            font-weight: 650;\n            letter-spacing: -0.01em;\n        }\n\n\n        #blog-content h2 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none;\n        }\n\n        #blog-content .faq-question {\n            font-weight: 650;\n            color: #1a1a1a;\n            margin-bottom: 0.4em;\n        }\n\n        \/* Brand promo modules *\/\n        #blog-content .flj-promo {\n            background: #fdf8f4;\n            border: 1px solid #f0e0d0;\n            border-left: 4px solid #FE5D00;\n            border-radius: 8px;\n            padding: 22px 24px;\n            margin: 2.4em 0;\n            display: flex;\n            flex-wrap: wrap;\n            align-items: center;\n            justify-content: space-between;\n            gap: 16px;\n        }\n\n        #blog-content .flj-promo .promo-content {\n            flex: 1 1 260px;\n        }\n\n        #blog-content .flj-promo .promo-content h4 {\n            margin: 0 0 6px;\n            color: #1a1a1a;\n        }\n\n        #blog-content .flj-promo .promo-content p {\n            margin: 0;\n            color: #555;\n        }\n\n        #blog-content .flj-promo .promo-action {\n            flex-shrink: 0;\n        }\n\n        #blog-content .flj-promo .spectra-popup-trigger-4901 {\n            display: inline-block;\n            background: #FE5D00;\n            color: #ffffff;\n            border: none;\n            padding: 12px 24px;\n            border-radius: 6px;\n            font-weight: 600;\n            cursor: pointer;\n            text-decoration: none;\n            transition: background 0.2s ease;\n            letter-spacing: 0.02em;\n            white-space: nowrap;\n            border-bottom: none;\n        }\n\n        #blog-content .flj-promo .spectra-popup-trigger-4901:hover {\n            background: #e05300;\n            border-bottom: none;\n        }\n\n        \/* Divider *\/\n        #blog-content hr {\n            border: none;\n            border-top: 1px solid #e8e8e8;\n            margin: 2.2em 0;\n        }\n\n        \/* Responsive *\/\n        @media (max-width: 640px) {\n            #blog-content {\n                padding: 14px 16px 36px;\n                font-size: 16px;\n            }\n\n\n            #blog-content figure.blog-image .img-placeholder {\n                min-height: 160px;\n            }\n\n            #blog-content .flj-promo {\n                flex-direction: column;\n                align-items: stretch;\n                text-align: left;\n                padding: 18px 18px;\n            }\n\n            #blog-content .flj-promo .promo-action {\n                margin-top: 4px;\n            }\n\n            #blog-content .flj-promo .spectra-popup-trigger-4901 {\n                width: 100%;\n                text-align: center;\n            }\n\n            #blog-content .article-meta {\n                flex-direction: column;\n                gap: 4px;\n\n            }\n\n            #blog-content ol.steps-list > li {\n                padding-left: 44px;\n            }\n\n            #blog-content ol.steps-list > li::before {\n                width: 32px;\n                height: 32px;\n\n            }\n        }\n\n    <\/style><div id=\"blog-content\">\n\n\n    <p>A PCB assembly defect is a condition in a populated board that does not meet its agreed workmanship, electrical,\n        or functional requirements. Most PCB assembly defects result from a chain of small process variations rather\n        than one isolated machine failure. Common sources include manufacturability issues in the design, inaccurate\n        solder-paste printing, component or BOM errors, poor placement, an uncontrolled reflow profile, contamination,\n        and inspection gaps. Prevent them by reviewing the design and BOM before build, controlling materials and\n        process parameters, then verifying critical stages with SPI, AOI, X-ray, and electrical tests.<\/p>\n    <p>This guide maps the main failure modes to their causes, prevention methods, and the inspection method most likely\n        to find them.<\/p>\n\n    <figure class=\"blog-image\">\n        <img decoding=\"async\" src=\"https:\/\/flj-pcb.com\/wp-content\/uploads\/2026\/08\/Common-PCB-assembly-defects.webp\"\n             alt=\"Common PCB assembly defects.\"\/>\n        <figcaption>Common PCB assembly defects and prevention workflow<\/figcaption>\n    <\/figure>\n\n    <h2>Common PCB assembly faults at a glance<\/h2>\n    <p>The table below is a troubleshooting map, not a substitute for the acceptance criteria agreed with the customer.\n        IPC-A-610 defines acceptability criteria for electronic assemblies, while J-STD-001 defines requirements for\n        soldered electrical and electronic assemblies. Apply the current agreed revision, product class, and customer\n        specification to each program.<\/p>\n\n    <div class=\"table-wrapper\">\n        <table>\n            <thead>\n            <tr>\n                <th><strong>L\u1ed7i<\/strong><\/th>\n                <th><strong>Typical causes<\/strong><\/th>\n                <th><strong>Prevention<\/strong><\/th>\n                <th><strong>Useful detection<\/strong><\/th>\n            <\/tr>\n            <\/thead>\n            <tbody>\n            <tr>\n                <td>Solder bridge or short<\/td>\n                <td>Excess paste, fine-pitch aperture, pad spacing, component shift, dirty stencil<\/td>\n                <td>Optimize aperture reduction, verify paste volume with SPI, maintain stencil cleanliness and\n                    placement accuracy\n                <\/td>\n                <td>SPI, AOI, microscope, ICT<\/td>\n            <\/tr>\n            <tr>\n                <td>Insufficient solder or open joint<\/td>\n                <td>Low paste deposit, clogged aperture, oxidation, poor wetting, lifted lead<\/td>\n                <td>Control paste storage and print settings; verify pad finish and reflow wetting<\/td>\n                <td>SPI, AOI, continuity\/ICT, X-ray for hidden joints<\/td>\n            <\/tr>\n            <tr>\n                <td>Tombstoning (drawbridge)<\/td>\n                <td>Unequal pad heating or paste volume, unbalanced pad geometry, component movement<\/td>\n                <td>Balance thermal mass, match aperture volumes, tune the profile and placement pressure<\/td>\n                <td>AOI and visual inspection<\/td>\n            <\/tr>\n            <tr>\n                <td>Component misalignment or rotation<\/td>\n                <td>Feeder\/nozzle errors, wrong centroid data, board registration error, poor fiducials<\/td>\n                <td>Validate CAD-to-machine data, maintain feeders and fiducials, use first-article approval<\/td>\n                <td>AOI, vision inspection<\/td>\n            <\/tr>\n            <tr>\n                <td>Voids in BGA or thermal-pad solder<\/td>\n                <td>Trapped flux volatiles, unsuitable paste volume or apertures, unsuitable profile<\/td>\n                <td>Use window-pane apertures, appropriate paste and profile, and a voiding target agreed for the\n                    application\n                <\/td>\n                <td>X-ray, cross-section when required<\/td>\n            <\/tr>\n            <tr>\n                <td>Solder balls or spatter<\/td>\n                <td>Excess paste, paste slumping, rapid ramp, moisture, dirty materials<\/td>\n                <td>Control paste rheology and storage, stencil design, ramp rate, and cleanliness<\/td>\n                <td>AOI, visual inspection<\/td>\n            <\/tr>\n            <tr>\n                <td>Head-in-pillow (BGA)<\/td>\n                <td>Warpage, oxidation, uneven paste, package and board movement during reflow<\/td>\n                <td>Manage moisture and warpage, use suitable paste volume and profile, verify BGA land design<\/td>\n                <td>X-ray screening; dye-and-pry or cross-section for confirmation<\/td>\n            <\/tr>\n            <tr>\n                <td>Non-wetting, lifted lead, or cold joint<\/td>\n                <td>Oxidized surfaces, insufficient heat, contamination, wrong alloy or profile<\/td>\n                <td>Confirm surface finish and material compatibility; profile the assembly and control handling<\/td>\n                <td>AOI, visual inspection, cross-section, electrical test<\/td>\n            <\/tr>\n            <tr>\n                <td>Wrong component or polarity<\/td>\n                <td>BOM revision error, counterfeit or mixed reels, feeder setup mistake, unclear marking<\/td>\n                <td>Lock approved BOM and AVL, barcode verification, kitting checks, polarity markings<\/td>\n                <td>Automated optical inspection, traceability review, functional test<\/td>\n            <\/tr>\n            <tr>\n                <td>Board warpage, delamination, or pad lifting<\/td>\n                <td>Moisture, excessive thermal stress, unsupported panel, unsuitable laminate or rework heat<\/td>\n                <td>Follow material handling rules, support the panel, control thermal cycles and rework temperatures\n                <\/td>\n                <td>Visual inspection, dimensional checks, cross-section, functional test<\/td>\n            <\/tr>\n            <\/tbody>\n        <\/table>\n    <\/div>\n\n    <h2>Where PCBA defects originate<\/h2>\n\n    <h3>1. Design, library, and BOM inputs<\/h3>\n    <p>Many PCB assembly problems are created before manufacturing. A footprint with the wrong pad length, an aperture\n        that does not match the pad, inadequate component-to-component clearance, or missing polarity information can\n        produce a defect on every board. A BOM that allows substitutes without engineering approval can introduce a\n        package, terminal finish, or moisture sensitivity level that the process was never qualified for.<\/p>\n    <p>Run a DFM\/DFA review against the supplier&#8217;s rules. Check land patterns, clearances, fiducials, panel rails, test\n        points, and polarized-part orientation. Philifast&#8217;s guide to <a\n                href=\"https:\/\/flj-pcb.com\/vi\/pcb-design-dft-dfm-dfa-key-design-considerations\/\">DFT, DFM, and DFA\n            design<\/a> and its <a\n                href=\"https:\/\/flj-pcb.com\/vi\/complete-pcb-design-workflow-from-schematic-to-gerber-files\/\">schematic-to-Gerber\n            workflow<\/a> cover this data handoff.<\/p>\n    <p>For procurement, freeze the approved manufacturer and part number in the BOM, record alternates explicitly, and\n        require lot or date-code traceability for critical parts. Incoming inspection should verify part number,\n        package, quantity, markings, and condition before kitting. A controlled <a\n                href=\"https:\/\/flj-pcb.com\/vi\/electronic-component-purchasing-guide-and-sourcing-tips\/\">electronic component\n            sourcing process<\/a> reduces wrong-part, counterfeit, and obsolete-component risk.<\/p>\n\n    <h3>2. Solder-paste printing and stencil control<\/h3>\n    <p>Printing determines how much solder is available before placement. Excess paste can bridge fine-pitch pads or\n        create solder balls; too little paste can produce opens, weak joints, and head-in-pillow. Common contributors\n        include worn or poorly cleaned stencils, blocked apertures, incorrect squeegee pressure or speed, board support\n        problems, paste that has exceeded its working life, and poor alignment between stencil and PCB.<\/p>\n    <p>Use a printer setup that controls alignment, pressure, speed, separation, and underside cleaning. Segment large\n        thermal-pad apertures and tune reductions for fine-pitch parts rather than applying one rule to the whole board.\n        SPI should measure paste height, area, volume, and offset and feed trends back to the printer before defects\n        reach reflow. Paste must be stored, tempered, mixed, and tracked according to its supplier instructions; do not\n        treat a refrigerator temperature or open-time limit from one alloy as universal.<\/p>\n    <p>For process background, see Philifast&#8217;s <a href=\"https:\/\/flj-pcb.com\/vi\/pcb-assembly\/\">PCB assembly overview<\/a>, <a\n            href=\"https:\/\/flj-pcb.com\/vi\/pcb-assembly\/smt-assembly\/\">SMT assembly page<\/a>, <a\n            href=\"https:\/\/flj-pcb.com\/vi\/essential-pcba-equipment-guide\/\">PCBA equipment guide<\/a>, v\u00e0 <a\n            href=\"https:\/\/flj-pcb.com\/vi\/smt-reflow-soldering-process-types-design-guide\/\">reflow soldering guide<\/a>.<\/p>\n\n    <h3>3. Component placement and handling<\/h3>\n    <p>Placement defects include offset, rotation, missing parts, wrong polarity, and wrong reference designators.\n        Feeder setup, nozzle wear, vacuum loss, centroid data, fiducials, and board movement can contribute. Connectors\n        and large packages may need a different strategy from small chip parts.<\/p>\n    <p>Prevent them with barcode-controlled kitting, feeder verification, first-article inspection, and locked programs.\n        Keep moisture-sensitive devices within the supplier&#8217;s packaging and floor-life limits and follow applicable\n        IPC\/JEDEC J-STD-033 handling controls. Use ESD controls and record reel, lot, and machine data for\n        traceability.<\/p>\n\n    <h3>4. Reflow, wave, and selective soldering<\/h3>\n    <p>The reflow profile must suit the alloy, board mass, component limits, and paste process window. Too little heat\n        can leave non-wetting or cold joints; excessive peak temperature or time above liquidus can damage parts or\n        laminate. Uneven heating can cause tombstoning or head-in-pillow, while poor support can warp thin or large\n        panels.<\/p>\n    <p>Profile representative board locations, not just oven set points, and re-profile after material, panel, or oven\n        changes. For mixed SMT\/THT boards, confirm that wave or selective soldering does not disturb nearby joints. See\n        the <a href=\"https:\/\/flj-pcb.com\/vi\/difference-between-reflow-soldering-and-wave-soldering\/\">reflow versus wave\n            soldering comparison<\/a>.<\/p>\n\n    <div class=\"flj-promo\">\n        <div class=\"promo-content\">\n            <h4>Philifast \u2014 PCB Assembly &#038; Manufacturing Services<\/h4>\n            <p>One-stop PCBA workflow with DFM, SPI, AOI, and X-ray inspection to reduce defects and improve\n                quality.<\/p>\n        <\/div>\n        <div class=\"promo-action\">\n            <a href=\"#\" class=\"spectra-popup-trigger-4901\" role=\"button\">Y\u00eau c\u1ea7u b\u00e1o gi\u00e1<\/a>\n        <\/div>\n    <\/div>\n\n    <h2>How to detect defects before shipment<\/h2>\n    <p>No single inspection method sees every failure mode. A practical control plan uses several methods in\n        sequence:<\/p>\n    <ol class=\"steps-list\">\n        <li><strong>SPI after printing<\/strong> measures paste volume and position. It catches a process drift while the\n            board can still be cleaned and reprinted.\n        <\/li>\n        <li><strong>AOI after reflow<\/strong> checks component presence, polarity, alignment, solder fillets, bridges,\n            and many visible lead defects. AOI cannot reliably see hidden BGA joints or every underside condition.\n        <\/li>\n        <li><strong>X-ray<\/strong> helps evaluate hidden joints, such as BGAs and bottom-terminated packages including\n            QFNs, and is useful for assessing voiding. Conventional 2D X-ray alone may not prove head-in-pillow because\n            it cannot always show whether the solder balls and paste fully coalesced. Set a voiding acceptance rule\n            based on the package, thermal function, reliability requirement, and applicable standard; a single universal\n            percentage is misleading.\n        <\/li>\n        <li><strong>ICT and flying-probe tests<\/strong> check electrical nets, shorts, opens, and component values where\n            test access and coverage are adequate. ICT is strongest when the design includes accessible test points and\n            a stable fixture strategy.\n        <\/li>\n        <li><strong>Ki\u1ec3m th\u1eed ch\u1ee9c n\u0103ng (FCT)<\/strong> powers the product and verifies behavior. It can expose assembly\n            errors that pass visual inspection, but it should not be used as the only quality gate because intermittent\n            or latent solder defects may escape.\n        <\/li>\n        <li><strong>Microscopy, cross-section, dye-and-pry, and failure analysis<\/strong> are used for containment and\n            root-cause confirmation, not routine screening of every board.\n        <\/li>\n    <\/ol>\n    <p>The <a href=\"https:\/\/flj-pcb.com\/vi\/pcba-testing-guide\/\">PCBA testing process guide<\/a> provides more detail on\n        combining these methods. Link results to the board serial number, program revision, material lots, and rework\n        history.<\/p>\n\n    <h2>A prevention workflow for PCB assembly quality<\/h2>\n    <p>Use the following sequence when launching or improving a product:<\/p>\n    <ol class=\"steps-list\">\n        <li><strong>Review the package:<\/strong> release controlled Gerbers, pick-and-place data, drawings, BOM,\n            approved alternates, and acceptance criteria. Run DFM\/DFA before ordering stencils or parts.\n        <\/li>\n        <li><strong>Qualify materials:<\/strong> verify PCB finish, solder paste alloy, component authenticity, moisture\n            sensitivity, shelf life, and storage records. Define what happens when a substitute is proposed.\n        <\/li>\n        <li><strong>Prove the setup:<\/strong> inspect the first panel, confirm feeder and polarity setup, measure SPI,\n            capture the reflow profile, and approve AOI libraries before volume production.\n        <\/li>\n        <li><strong>Control the line:<\/strong> trend SPI and AOI results, clean the stencil at a defined interval,\n            verify ESD and humidity controls, and stop the line when a trend exceeds the agreed limit rather than\n            sorting defects indefinitely.\n        <\/li>\n        <li><strong>Test and learn:<\/strong> use electrical and functional tests appropriate to the product risk. For\n            every recurring defect, contain affected lots, identify the escape point, verify the physical cause, and\n            document a corrective action.\n        <\/li>\n    <\/ol>\n    <p>For a new design, <a href=\"https:\/\/flj-pcb.com\/vi\/pcb-assembly\/prototype-pcb-assembly-speed-qa-support\/\">prototype\n        PCB assembly support<\/a> can expose manufacturability issues early.<\/p>\n\n    <div class=\"flj-promo\">\n        <div class=\"promo-content\">\n            <h4>Philifast \u2014 PCB Assembly Quality Control<\/h4>\n            <p>Comprehensive PCBA testing and inspection services to detect defects before shipment.<\/p>\n        <\/div>\n        <div class=\"promo-action\">\n            <a href=\"#\" class=\"spectra-popup-trigger-4901\" role=\"button\">Y\u00eau c\u1ea7u b\u00e1o gi\u00e1<\/a>\n        <\/div>\n    <\/div>\n\n    <h2>A practical troubleshooting method<\/h2>\n    <p>When a defect appears, record the reference designator, board side, panel position, component lot, machine\n        program, stencil ID, paste lot, and oven profile. Ask: <strong>Is it random or location-specific? Did it start\n            after a material or setup change? Which inspection stage first found it?<\/strong><\/p>\n    <p>A repeated footprint defect points to design, stencil, library, or thermal-balance issues. A defect that follows\n        a reel or feeder points to material or placement control. A panel-wide shift suggests registration, support, or\n        profile problems. Verify the cause with a controlled trial and update the process plan; do not mask it with\n        manual rework.<\/p>\n\n    <h2>C\u00e2u h\u1ecfi th\u01b0\u1eddng g\u1eb7p<\/h2>\n\n    <div class=\"faq-item\">\n        <p class=\"faq-question\">What is the most common cause of PCB assembly defects?<\/p>\n        <p>There is no universal cause. Solder-paste printing and placement are frequent sources because small changes\n            affect many joints, but design data, component condition, and reflow control can be equally important.<\/p>\n    <\/div>\n    <div class=\"faq-item\">\n        <p class=\"faq-question\">Can AOI find every PCBA defect?<\/p>\n        <p>No. AOI checks visible presence, polarity, alignment, bridges, and lead soldering, but not hidden BGA\/QFN\n            joints or electrical performance. Combine it with SPI, X-ray where needed, ICT or flying-probe, and\n            functional testing.<\/p>\n    <\/div>\n    <div class=\"faq-item\">\n        <p class=\"faq-question\">Can X-ray confirm a head-in-pillow defect?<\/p>\n        <p>Not always. X-ray can screen BGA joint geometry and reveal voiding, but a conventional 2D image may not show\n            whether the solder ball and paste fully joined. If head-in-pillow is suspected, use X-ray alongside process\n            data and, when confirmation is necessary, a suitable destructive method such as dye-and-pry or cross-section\n            analysis.<\/p>\n    <\/div>\n    <div class=\"faq-item\">\n        <p class=\"faq-question\">Why do components tombstone during reflow?<\/p>\n        <p>Tombstoning occurs when unequal forces lift one end of a small component. Pad heating or paste-volume\n            imbalance and placement offset are common contributors. Balance the footprint and deposits, improve thermal\n            uniformity, and verify the profile with thermocouples.<\/p>\n    <\/div>\n    <div class=\"faq-item\">\n        <p class=\"faq-question\">What causes BGA solder voids?<\/p>\n        <p>BGA voids form when flux volatiles are trapped as solder reflows. Paste formulation, aperture design and\n            deposited volume, pad finish, package geometry, and the thermal profile can all affect their size and\n            distribution. Evaluate voiding by its location and the product&#8217;s thermal and reliability needs, rather than\n            applying one limit to every package.<\/p>\n    <\/div>\n    <div class=\"faq-item\">\n        <p class=\"faq-question\">How can procurement teams reduce PCB assembly problems?<\/p>\n        <p>Control the BOM and approved vendor list, require traceable parts, define substitution approval, and share\n            the complete data package before quoting. Ask about incoming inspection, moisture-sensitive devices, ESD,\n            stencil revision, test coverage, and nonconforming material.<\/p>\n    <\/div>\n    <div class=\"faq-item\">\n        <p class=\"faq-question\">What is the difference between a PCB defect and a PCBA defect?<\/p>\n        <p>A PCB defect is a problem in the bare board, such as an open trace, plating issue, or dimensional error. A\n            PCBA defect is introduced during component assembly or soldering, such as a bridge, missing part, wrong\n            polarity, or defective solder joint. Some failures interact: a poor pad finish on the bare PCB can become a\n            non-wetting assembly defect.<\/p>\n    <\/div>\n    <div class=\"faq-item\">\n        <p class=\"faq-question\">Which standards should define acceptance?<\/p>\n        <p>Use the requirements named in the purchase order, drawings, and quality plan. Commercial programs commonly\n            use IPC-A-610 for assembly acceptability and J-STD-001 for soldering requirements. NASA-STD-8739.3 covers\n            soldered electrical connections for NASA programs and applies only when a program or contract invokes it.\n            Agree the class, revision, inspection method, and evidence requirements before production.<\/p>\n    <\/div>\n\n    <div class=\"flj-promo\">\n        <div class=\"promo-content\">\n            <h4>Philifast \u2014 Reduce PCB Assembly Defects<\/h4>\n            <p>From DFM review to final inspection, we help you build reliable boards.<\/p>\n        <\/div>\n        <div class=\"promo-action\">\n            <a href=\"#\" class=\"spectra-popup-trigger-4901\" role=\"button\">Y\u00eau c\u1ea7u b\u00e1o gi\u00e1<\/a>\n        <\/div>\n    <\/div>\n\n    <h2>Technical references<\/h2>\n    <ul>\n        <li><a href=\"https:\/\/www.ipc.org\/\" target=\"_blank\" rel=\"noopener\">IPC<\/a> &#8211; publisher of IPC-A-610 and J-STD-001 for electronic assemblies.\n        <\/li>\n        <li><a href=\"https:\/\/standards.nasa.gov\/\" target=\"_blank\" rel=\"noopener\">NASA Technical Standards System<\/a> &#8211; source for NASA-STD-8739.3 and\n            other NASA workmanship standards.\n        <\/li>\n        <li><a href=\"https:\/\/www.jedec.org\/standards-documents\" target=\"_blank\" rel=\"noopener\">JEDEC standards<\/a> &#8211; semiconductor packaging and\n            handling standards; IPC\/JEDEC J-STD-033 addresses moisture-sensitive-device handling.\n        <\/li>\n        <li><a href=\"https:\/\/www.nist.gov\/advanced-manufacturing\" target=\"_blank\" rel=\"noopener\">NIST Advanced Manufacturing<\/a> &#8211; research and\n            measurement guidance relevant to manufacturing process control.\n        <\/li>\n    <\/ul>\n\n    <hr>\n\n    <p style=\"font-size: 0.88em; color: #888; text-align: center; margin-top: 2em;\">\n        Published by Philifast Editorial Team &middot; 2026-08-21\n    <\/p>\n\n<\/div>","protected":false},"excerpt":{"rendered":"<p>A PCB assembly defect is a condition in a populated board that does not meet its agreed workmanship, electrical, or [&hellip;]<\/p>\n","protected":false},"author":1,"featured_media":5166,"comment_status":"open","ping_status":"open","sticky":false,"template":"","format":"standard","meta":{"_uag_custom_page_level_css":"","site-sidebar-layout":"default","site-content-layout":"","ast-site-content-layout":"default","site-content-style":"default","site-sidebar-style":"default","ast-global-header-display":"","ast-banner-title-visibility":"","ast-main-header-display":"","ast-hfb-above-header-display":"","ast-hfb-below-header-display":"","ast-hfb-mobile-header-display":"","site-post-title":"","ast-breadcrumbs-content":"","ast-featured-img":"","footer-sml-layout":"","ast-disable-related-posts":"","theme-transparent-header-meta":"","adv-header-id-meta":"","stick-header-meta":"","header-above-stick-meta":"","header-main-stick-meta":"","header-below-stick-meta":"","astra-migrate-meta-layouts":"default","ast-page-background-enabled":"default","ast-page-background-meta":{"desktop":{"background-color":"var(--ast-global-color-5)","background-image":"","background-repeat":"repeat","background-position":"center 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