What is PCB Impedance Control?
PCB impedance control means controlling the impedance of traces. This impedance is also called controlled impedance. Controlled impedance is the characteristic impedance of a transmission line formed by PCB traces and their reference planes. When high-frequency signals travel on PCB transmission lines, this matters. Controlled impedance is important to solve signal integrity problems. Signal integrity means the signal travels without distortion.
The circuit impedance is set by the PCB physical size and the dielectric material. It is measured in ohms (Ω). Types of PCB transmission lines that need impedance control include single-ended microstrip, single-ended stripline, differential microstrip pair, differential stripline pair, embedded microstrip, and coplanar (single-ended and differential).
Common methods to achieve impedance control
1. Use PCB layer structure
PCB designers can use the board layer stack to control impedance. Put different signal layers at different positions to control capacitance and inductance between layers. Usually, inner layers use higher impedance choices and outer layers use lower impedance choices to reduce reflection and crosstalk.
2. Use differential signal lines
Differential pairs give better noise rejection and lower crosstalk risk. A differential pair is two parallel conductors. Their voltages are equal in size and opposite in polarity. Differential pairs give better signal integrity and noise resistance. The impedance of a differential pair is controlled by the spacing, trace width, and the ground plane layout.
3. Control trace geometry
Trace width, spacing, and layout geometry can also control impedance. For common microstrip, wider traces and larger spacing lower impedance. For coaxial type structures, a smaller inner conductor and a larger outer conductor radius raise impedance. Choose trace geometry based on target impedance and signal frequency.
4. Choose PCB materials
The dielectric constant of the PCB material affects impedance. Picking materials with stable dielectric properties is part of impedance control. For high frequency and high speed use, common materials are fr4 (glass-epoxy), PTFE (Teflon), and RF laminates.
5. Use simulation and design tools
Before final PCB layout, use simulation and design tools to check and optimize impedance. These tools simulate circuit behavior, signal loss, and electromagnetic interactions. They help find the best board parameters. Common tools include CST Studio Suite, HyperLynx, and ADS.
Effects of PCB manufacturing on impedance
Trace width
Trace width directly affects transmission line impedance and loss. Most good engineers give the PCB maker a trace width tolerance with Gerber files. For example, if a trace width is designed as 6.2 mil and its impedance is 50 ohm, manufacturing instability that changes the trace width will change impedance. From experience with many factories, trace width may vary about 10%. We can model trace width change as a Gaussian distribution with a standard deviation of 10%.
Copper foil / plated copper thickness
In PCB products, copper thickness has two parts: base copper thickness and plated copper thickness. Base copper is relatively uniform, but plated copper uniformity depends on factory process. Plated copper may vary a lot between factories. Different plated copper thickness will change trace impedance and loss. Impedance may vary in a small range, for example between 49.5 and 51 ohm. Compared with trace width, copper thickness has a smaller effect on impedance.
Dielectric thickness
In PCB manufacture, dielectric thickness changes come from raw material variation, lamination pressure, and glue filling. If dielectric thickness changes, impedance and loss will change. In severe cases, transmission lines will have large loss. Impedance may vary from about 44 ohm to 54 ohm. The range can be as wide as 10 ohm.
Etch factor
Conductors have finite thickness. After etch, traces are not perfect rectangles. They look closer to a trapezoid. The trapezoid angle changes with copper thickness (including plating). When copper is thin, the sidewall angle approaches 90°. The angle size affects impedance. For example, when the sidewall angle is 70°, impedance is about 50 ohm. When the angle is 90°, impedance is about 48.37 ohm.
The above tests change one factor at a time. In real production, multiple variables change at once. Impedance can vary from about 40 ohm to 56 ohm. This far exceeds a typical requirement such as 50Ω ±10%. During production, many parameters cause impedance change. For high-speed or high-end products, the PCB design and manufacturing process must strictly control every material and step. Otherwise, the product can show unexpected problems.
Impedance and characteristic impedance
1. Resistance
When an alternating current flows in a conductor, the opposition it meets is called impedance (Impedance). Symbol is Z. Unit is still ohm (Ω). This opposition differs from DC resistance. In AC, besides resistance (R), there are inductive reactance (XL) and capacitive reactance (XC).
To distinguish from DC resistance, call the AC opposition impedance (Z).
The formula:
Z = √(R² + (XL − XC)²)
2. Impedance (Z)
With higher IC integration and higher signal frequency and speed, signals on PCB traces can be affected by the PCB trace itself. When signal frequency reaches a limit, the trace causes serious signal distortion or loss. This shows PCB traces carry not just current but energy in the form of pulses or square wave signals.
3. Characteristic impedance control (Z0)
The opposition a signal sees when it travels is called characteristic impedance. Symbol is Z0.
So, fixing only “open”, “short”, and connectivity is not enough. For high speed and high frequency transmission lines, quality must be stricter. Passing an open/short test or having small defects is not enough. You must measure Z0 and keep it within tolerance. If not, the board must be scrapped. Do not rework.
Signal propagation and transmission lines
1. Definition of a signal transmission line
From electromagnetic theory, shorter wavelength (λ) means higher frequency (f). Their product equals light speed. That is:
C = λ · f = 3 × 10^10 cm/s
Any device may have a high signal frequency. After the signal travels through a PCB trace, the signal may slow or be delayed.
So, shorter trace length is better.
Increasing wiring density or reducing wire size helps. But when component frequency becomes higher or pulse periods shorten, trace length may approach a portion of the signal wavelength. Then the trace will show obvious distortion.
IPC-2141 clause 3.4.4 says: when a trace length approaches 1/7 of the signal wavelength, the trace is treated as a signal transmission line.
Example:
A device has signal frequency f = 10 MHz. PCB trace length is 50 cm. Do we need characteristic impedance control?
Compute:
C = λ · f = 3 × 10^10 cm/s
λ = C / f = (3 × 10^10 cm/s) / (1 × 10^7 /s) = 3000 cm
trace length / wavelength = 50 / 3000 = 1/60
Because 1/60 is much less than 1/7, this trace is a normal wire and does not need characteristic impedance control.
Maxwell’s equations tell us: the propagation speed VS of a sine wave in a medium relates to light speed C and dielectric constant εr as:
VS = C / √εr
When εr = 1, signal speed equals light speed = 3 × 10^10 cm/s.
2. Transmission speed and dielectric constant
Signal speed at 30 MHz for different materials:
| Material / Substrate | Tg (°C) | Dielectric constant εr | Signal speed (m/μs) |
|---|---|---|---|
| Vacuum | / | 1.0 | 300.00 |
| PTFE (Teflon) | / | 2.2 | 202.26 |
| Thermoset polyphenylene ether | 210 | 2.5 | 189.74 |
| Cyanate ester | 225 | 3.0 | 173.21 |
| PTFE + E-glass | / | 2.6 | 186.25 |
| Cyanate ester + glass | 225 | 3.7 | 155.96 |
| Polyimide + glass | 230 | 4.5 | 141.42 |
| Quartz | / | 3.9 | 151.98 |
| Epoxy glass (fr4) | 130±5 | 4.7 | 138.38 |
| Aluminium | / | 9.0 | 100.00 |
The table shows: as εr increases, signal speed in the material decreases. To get higher signal speed, choose higher characteristic impedance. To get higher Z0, choose lower εr material. PTFE has the smallest εr, so it gives the fastest speed.
fr4 board uses epoxy resin plus E-glass. Its εr is about 4.7. Signal speed is 138 m/μs. Changing the resin system can change εr.
Reasons to control characteristic impedance
Reason 1
When electronic equipment (computer, communications) runs, the driver sends a signal to the receiver through PCB traces. The characteristic impedance Z0 of the trace must match the driver and receiver electronic impedance. If matched, the signal energy transmits completely.
Reason 2
If PCB quality is bad and Z0 is out of tolerance, signals will reflect, dissipate, attenuate, or delay. In severe cases, signals can be wrong and the device can crash.
Reason 3
Strict material selection and process control are needed so multilayer board Z0 meets customer specs. Higher electronic impedance components usually need higher PCB Z0 to match. A multilayer board with correct Z0 is a qualified high-speed or high-frequency product.
Relationship of Z0 to material and process
The microstrip characteristic impedance Z0 formula:
Z0 = 87 / √εr + 1.41 · ln [ 5.98 H / (0.8 W + T) ]
Where:
εr — dielectric constant
H — dielectric thickness
W — trace width
T — trace thickness
Lower εr makes it easier to raise Z0 to match high-speed components.
1. Z0 and εr
Z0 is inversely related to εr. Z0 increases as H increases. For strict Z0 high-frequency lines, dielectric thickness tolerance must be strict. Usually dielectric thickness change must not exceed 10%.
2. Dielectric thickness effect
With higher routing density, larger H leads to more electromagnetic interference. For high-frequency and high-speed digital lines, as conductor density rises, reduce dielectric thickness to lower EMI and crosstalk, or use materials with lower εr.
From the formula, copper thickness T is an important factor. Larger T lowers Z0, but the change is small.
3. Copper thickness effect
Thinner copper gives higher Z0, but its effect on Z0 is small. Using thin copper helps make fine traces and this helps control Z0 more than the copper thickness value alone.
From the formula:
Z0 = 87 / √εr + 1.41 · ln [ 5.98 H / (0.8 W + T) ]
As W (trace width) decreases, Z0 increases. Changing width has a larger impact on Z0 than changing thickness.
4. Trace width effect
Z0 increases sharply as width W narrows. To control Z0, control trace width tightly. Today most high-frequency and high-speed digital traces have widths like 0.10 mm or 0.13 mm. Traditionally, width tolerance was ±20%. For non-transmission line traces (trace length << signal wavelength / 7), ±20% may be fine. But for Z0 controlled traces, ±20% width error cannot meet requirements. At that point Z0 error often exceeds ±10%.
Example:
A PCB microstrip has width 100 μm, thickness 20 μm, dielectric thickness 100 μm. Assume copper thickness is uniform. If width changes ±20%, can Z0 meet ±10%?
By formula:
Let W0 = 100 μm, W1 = 80 μm, W2 = 120 μm, T = 20 μm, H = 100 μm. Then Z01 / Z02 = 1.20. So Z0 just reaches ±10%, not within ±10%. To get Z0 within ±10%, width variation must be much smaller than ±20%. To get Z0 ≤ ±5%, width tolerance must be ≤ ±10%.
This explains why some PTFE PCBs and some fr4 PCBs require width tolerance ±0.02 mm. The reason is to control Z0.
Process controls for characteristic impedance
Film making control and inspection
Keep constant temperature and humidity (21±2°C, 55±5%), keep a clean room, and do width process compensation.Panel design
Panel edges should not be too narrow. Make plating uniform. Use pseudo-cathode in electroplating to distribute current. Add a coupon on the panel edge to test Z0.Etching
Control process parameters to reduce undercut. Do first-pass inspection. Reduce residual copper, copper burrs, and copper scraps. Check trace width and keep it within required range (±10% or ±0.02 mm).AOI inspection
For inner layers, find trace gaps and protrusions. For 2 GHz high-speed signals, even a 0.05 mm gap must cause board scrap. Controlling inner layer width and defects is key.Lamination
Use vacuum lamination to lower pressure and reduce resin flow. Keep more resin because resin affects εr. More resin often lowers εr. Control lamination thickness tolerance. If finished board thickness is uneven, dielectric thickness varies and affects Z0.Select good base material
Strictly follow customer material model. Wrong model means wrong εr, wrong thickness. A full process done with wrong material still results in scrap because Z0 depends strongly on εr.Solder mask (coverlay)
Solder mask on the board surface can lower Z0 by 1–3 Ω. In theory, solder mask thickness should not be too thick. In practice the effect is not huge. Before solder mask, the conductor surface interfaces with air (εr = 1) so measured Z0 is higher. After solder mask, Z0 drops 1–3 Ω because solder mask εr is about 4.0.Moisture absorption
Avoid moisture absorption in finished multilayer boards. Water has εr ≈ 75. Moisture causes large Z0 drop and instability.
Sammenfatning
For multilayer board transmission lines, common Z0 control ranges are:
50 Ω ±10%
75 Ω ±10%
28 Ω ±10%
To control variation, consider these four main factors:
Trace width W
Trace thickness T
Dielectric thickness H
Dielectric constant εr
The largest influence is dielectric thickness H. Next is dielectric constant εr. Then trace width W. The smallest is trace thickness T. After choosing base material, εr change is small. H can be controlled but still varies. T is easier to control. Controlling trace width W within ±10% is hard. Trace issues like pinholes, gaps, and dents also matter. In many ways, the most effective and important method to control Z0 is to control and adjust trace width precisely.

